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Project Evaluation Criteria, Deliverables
about an hour ago • updated by Rajesh Chandrasekhara Panicker • view change
[Optional*] Coprocessor Integration using DMA
25 Mar 2023 • updated by Rajesh Chandrasekhara Panicker • view change
Lab 3 : Integrating the Coprocessor
25 Mar 2023 • updated by Rajesh Chandrasekhara Panicker • view change
High Level Synthesis Flow
19 Mar 2023 • updated by Rajesh Chandrasekhara Panicker • view change
Project (MLP Neural Network)
18 Mar 2023 • updated by Rajesh Chandrasekhara Panicker • view change
Lab 4 : High Level Synthesis, Measuring Performance
13 Mar 2023 • updated by Rajesh Chandrasekhara Panicker • view change
Lab 1 : Introduction to Hardware Design
28 Feb 2023 • updated by Rajesh Chandrasekhara Panicker • view change
Coprocessor Integration using AXI Stream FIFO
28 Feb 2023 • updated by Rajesh Chandrasekhara Panicker • view change
Installing Xilinx Vitis 2019.2
24 Feb 2023 • updated by Rajesh Chandrasekhara Panicker • view change
Lab 2 : Introduction to Hardware/Software Co-design
31 Jan 2023 • updated by Rajesh Chandrasekhara Panicker • view change
EE4218 Labs
27 Jan 2023 • updated by Rajesh Chandrasekhara Panicker • view change
Software development using Vitis
23 Feb 2022 • updated by Rajesh Chandrasekhara Panicker • view change
RealTerm
23 Feb 2022 • updated by Rajesh Chandrasekhara Panicker • view change
Creating the hardware platform
28 Jan 2022 • updated by Rajesh Chandrasekhara Panicker • view change
Packaging the Coprocessor as an IP
16 Feb 2021 • updated by Rajesh Chandrasekhara Panicker • view change

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