Good evening Professor,
We are updating on our progress today. Our transmitter side is able to produce 8 bits frame marker, followed by 8 bits data. Our sub-blocks are still in progress. We have a working ADPLL, Codec at Transmitter side, Pseudo-noise generator, Frequency divider (at both sides) and laser link. We will be working on our Frame Synchronisation and codec at the receiver side tomorrow. However, we have some doubts on the frame synchronisation. We understand the idea, but when we want to implement it into logic and integrate on breadboard, we faced with some issues. I have attached a copy of our question as follows: SHIFT REGISTER.docx
We thank you in advance.
Vincent Lim, Cheryl Teoh, Kai Wen, Zhi Ming, Kenneth Lim
EE1003 Group 5